With the rapid development of various digital innovations such as Generative AI, the demand for high-performance chips in the market has surged dramatically, leading to increased complexity in chip design. Take Nvidia's H100 GPU, for example, which contains 80 billion transistors. Managing such a vast number of transistors, coupled with increasingly tight market schedules and shrinking product lifecycles, makes relying solely on manual development nearly impossible. To address this challenge, Maxeda Technology has partnered with international IC design giants to offer a range of production-validated AI-assisted EDA (Electronic Design Automation) solutions. We hope that our participation in the TIE Award competition will allow more international companies to see Taiwan's innovative achievements in EDA and create opportunities for further collaboration.
Strong R&D Team with Customers Among the Top Ten Global IC Design Fabless Companies
Founded in 2015, Maxeda Technology specializes in EDA. We offer solutions in the field of digital design for integrated circuits, including dataflow analysis, layout automation, placement optimization, and tailored solutions.
The dataflow analysis and Floorplan exploration tools developed by Maxeda Technology can significantly enhance chip design efficiency.
Dr. Yao-Wen Chang is one of Maxeda Technology's co-founders and he is the Dean of EECS at National Taiwan University, and also the mentor of the company's CEO, Dr. Tung-Chieh Chen. Under Professor Chang's leadership and with the support of Taiwan's Ministry of Science and Technology's incubation program and the support of the Business Angel Investment Program of the National Development Fund, Maxeda Technology was established. With outstanding R&D capabilities, Maxeda Technology has successfully attracted investments from companies like Raydium and MediaTek. And also successfully introduced products to multiple top-ten global IC design fabless companies.
"Our team possesses robust R&D capabilities and we have accumulated numerous core technologies", Dr. Chen describes. Currently, the company boasts a team of over 25 R&D engineers, with core members holding extensive experience in the EDA field. The team includes two researchers who were crowned champions in different editions of the ACM CADathlon at ICCAD (known as the Olympiad for EDA). Furthermore, four team members have secured championship titles in Taiwan IC/CAD Contest. Dr. Chen himself was honored by the ACM/IEEE Design Automation Conference (DAC) with Under-40 Innovators Award in 2021, recognizing his outstanding contributions and achievements in advancing the field of EDA
It is worth mentioning that the paper co-published by Maxeda, MediaTek, and NTU titled "Flexible Chip Placement via Reinforcement Learning" was selected as a publicity paper for the DAC. The AI-assisted EDA Solution also received third place in the semiconductor category of the TIE Award this year.
The Trends: Enhancing Chip Design Efficiency with AI-assisted EDA Solutions
EDA, revered as the 'Mother of Chips,' is the Key to Achieving Digital Innovation. IC design engineers utilize EDA tools to design chip functions, convert the code into actual circuit designs, and verify the correctness of designs before mass production. Consequently, in the face of rapidly increasing transistor counts within chips and the growing complexity of processes, EDA will determine chip design schedules and performance. Embracing the trend of integrating AI into the EDA field becomes a crucial factor in determining whether future IC design can overcome challenges in the post-Moore era.
Dr. Tung-Chieh Chen points out that Google and Nvidia are integrating AI technology into IC design now. Consequently, an increasing number of IC design engineers are considering how to adopt AI technology into the IC design process, particularly through techniques like Reinforcement Learning.
However, even for tech giants like Google, incorporating reinforcement learning into the chip design process presents challenges. This is because reinforcement learning requires over 100,000 iterations to achieve optimized results. Consequently, it is a very time-consuming method and requires extremely high machine resources."
In addition, existing commercial solutions are primarily focused on achieving precise placement and routing to meet IC tape-out criteria. However, this time-consuming approach is not well-suited for reinforcement learning, as it requires even more resources and processing time. Therefore, when introducing AI technology, reducing the resources required for applying reinforcement learning while maintaining a high correlation to the final results becomes a crucial point of AI technology adoption.
To address this challenge, Maxeda Technology has introduced the MaxPlace RL Reward Platform. This platform overcomes the limitations of machine resources and processing time by 100 times faster placement while maintaining high correlation rewards. Through real-world production validation, it has been demonstrated that the floorplan results produced by reinforcement learning significantly outperform the original reference design flow. This effectively optimizes chip performance and reduces the physical design from several months to just a few days.
MaxPlace RL Reward Platform
Dr. Tung-Chieh Chen uses the analogy of architecture to describe Maxeda Technology's role in chip design, emphasizing their focus on early-stage floorplanning, much like an architect designing a house. In architecture, the initial floorplanning involves designing the overall structure, layout, and flow of spaces like bathrooms, living rooms, and corridors before delving into detailed design elements. A good start is half the success, when floorplanning is done correctly, coupled with precise placement and routing EDA tools, it can assist IC design engineers in shortening design time and achieving better chip performance.
As an EDA company with a vision to develop innovative solutions, Maxeda Technology continues to collaborate closely with partners to develop validated AI-assisted EDA solutions. These solutions support engineers in overcoming the challenges of chip design and optimizing chip performance to accelerate digital innovation. Additionally, Maxeda Technology looks forward to leveraging the exposure by TIE to create more opportunities for collaboration with global chip design companies and further enhance Taiwan's resilience and competitiveness in the semiconductor industry.
