The AI boom has fueled the high-performance semiconductor market. SK Hynix, in light of investment reduction, has elected to expand its HBM technology capabilities through recent allocations of internal packaging talent.
Citing industry sources, Seoul Economy pointed out that SK Hynix's wafer-level packaging (WLP) business group, which is under the PKT&Test (P&T) division, has decided to reorganize and supplement back-end process technology talents through the company's internal career growth program (CGP).
It's reported that SK Hynix is currently reviewing the relevant personnel profiles to determine whether or not to assign them to the WLP business group. Although the exact scale of this redeployment has not been finalized yet, it's estimated that at least several dozen people will be involved.
The WLP business group is primarily responsible for next-gen back-end process technologies. This includes the development, mass production, and yield rate management of the Through-Silicon Via (TSV) technology. TSV is used in HBM manufacturing by SK Hynix.
As AI investments drive HBM demand, the workload of SK Hynix's back-end process division has also increased significantly. This has prompted the need for additional personnel. Insider sources pointed out that while SK Hynix plans to maintain its overall strategy of reduced investments, it also plans to prioritize the expansion of HBM product production, hence the internal personnel reassignments.
HBM involves vertically connecting multiple DRAM chips. With chip stacking, heat dissipation becomes a factor that needs to be considered. Therefore, packaging technology will determine the HBM's performance and production capacity. South Korean suppliers prefer TSV packaging. SK Hynix also utilizes its self-developed mass reflow molded underfill (MR-MUF) technology to further address the heat dissipation issues and gain an advantage in the next-gen HBM market.
